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 Ordering number : EN5913
CMOS IC
LC75281E
Parametric Equalizer System
Overview
The LC75281E is a four-band stereo parametric equalizer. A parametric equalizer is a fully general equalizer that allows all three parameters that define an equalizer's characteristics, i.e., the center frequency, gain, and Q, to be set independently.
Package Dimensions
unit: mm 3159-QFP64E
[LC75281E]
Functions
* Four-band (low, low mid, high mid, and high) left and right channels parametric equalizer * For each band: Center frequency: 11 positions Gain: 13 positions in 2dB steps Q: Variable over 8 positions * The center frequency, gain, and Q control settings are set using serial data input in the CCB format.
Features
* A parametric equalizer with the following features can be implemented with just two ICs: this IC and a microcontroller. * The center frequency, gain, and Q can be controlled by a single operation. * Memory recall by a single operation can be implemented using preset values. * Either shelving or peaking characteristics can be selected for the low band.
SANYO: QFP64E (QIP64E)
* CCB is a trademark of SANYO ELECTRIC CO., LTD. * CCB is SANYO's original bus format and all the bus addresses are controlled by SANYO.
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
101698RM (OT) No. 5913-1/10
LC75281E Pin Assignment
No. 5913-2/10
LC75281E
Specifications
Absolute Maximum Ratings at Ta = 25C, VSS = 0 V
Parameter Maximum supply voltage Maximum input voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN1 max VIN2 max Pd max Topr Tstg LIN, RIN CL, CE, DI Ta 85C Conditions Ratings 10.5 0 to VDD 0 to VDD 300 -40 to +85 -50 to +125 Unit V V V mW C C
Allowable Operating Ranges at Ta = -40 to +85C, VSS = 0 V
Parameter Supply voltage High-level input voltage Low-level input voltage Input voltage range Load resistance Input pulse width Setup time Hold time Operating frequency Symbol VDD VIH VIL VIN RL tow tsetup thold fopg CL, CE, DI CL, CE, DI LIN, RIN LOUT, ROUT, MIXOUT CL CL, CE, DI CL, CE, DI CL Conditions Ratings min 6.0 4.0 VSS 0 1 1 1 1 500 typ max 9.0 VDD 1.0 VDD Unit V V V V k s s s kHz
Electrical Characteristics at Ta = 25C, f = 1 kHz, VDD = 8 V, VSS = 0 V
Parameter Current drain Output voltage Symbol IDD VO THD1 Total harmonic distortion THD2 VDD LOUT, ROUT: THD = 1% LOUT, ROUT: Vo = Flat, VIN = 0 dBV LOUT, ROUT: Vo = Boost, All bands +2 dB, VIN = -15 dBV LOUT, ROUT: Vo = Flat, Rg = 1 k, IHF-A filters LOUT, ROUT: Vo = Flat, Rg = 1 k, DIN filters LOUT, ROUT, Rg = 1 k, f0 = f1, Q = Q1 IHF-A filter, all bands at full boost, with the external constants the same as those for the center frequency (example 1) LOUT, ROUT, Rg = 1 k, f0 = f1, Q = Q1 IHF-A filters, all bands at full cut, with the external constants the same as those for the center frequency (example 1) VIN = 1 Vrms, f = 1 kHz CL, DI, CE, VIN = 9 V CL, DI, CE, VIN = 0 V All bands G = +12 dB, Q: Setting switched from Q1 to Q2 With the external constants the same as those for the center frequency (example 1) shown on page 7. -1 60 Conditions Ratings min typ 36 2.2 0.005 0.1 0.01 1 max 50 Unit mA Vrms % %
VN1 VN2
7
15
s
13
s
Output noise voltage
VN3
58
s
VN4 Crosstalk between inputs High-level input current Low-level input current CT IIH IIL
23
s
80 1
dB A A
DC variation
VDC
-10
+10
mV
Pin Functions
Pin No. 64 1 2 3 4 5 6 7 8 Pin LLC2 LLC1 LLC4 LLC3 LLC5 LLMC2 LLMC1 LLMC4 LLMC3 Function Left channel low band control block. External capacitor connections.
Left channel low mid band control block. External capacitor connections.
Continued on next page. No. 5913-3/10
LC75281E
Continued from preceding page.
Pin No. 10 11 12 13 14 15 16 17 18 19 20, 24, 29 56, 57 23 21 22 27 26 25 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 58 59 61 62 55 54 52 51 60 53 63 50 28 Pin LHMC2 LHMC1 LHMC4 LHMC3 LHMC5 LHC2 LHC1 LHC4 LHC3 LHC5 NC Vref VSS VDD CE DI CL RLC2 RLC1 RLC4 RLC3 RLC5 RLMC2 RLMC1 RLMC4 RLMC3 RLMC5 RHMC2 RHMC1 RHMC4 RHMC3 RHMC5 RHC2 RHC1 RHC4 RHC3 RHC5 LCUT2 LCUT1 LBOOS2 LBOOS1 RCUT2 RCUT1 RBOOS2 RBOOS1 LIN RIN LOUT ROUT TEST Internal filter DC offset voltage exclusion capacitor connections. Capacitors of about 10 F must be connected between pins 61 and 62, and between pins 63 and 64. (These are for the left channel block.) Internal filter DC offset voltage exclusion capacitor connections. Capacitors of about 10 F must be connected between pins 51 and 52, and between pins 49 and 50. (These are for the right channel block.) Left channel audio signal input (Must be driven with a low load capacitance.) Right channel audio signal input (Must be driven with a low load capacitance.) Left channel audio signal output (Must be received with a low load capacitance.) Right channel audio signal output (Must be received with a low load capacitance.) IC test pin. This pin must be left open when not used for IC test. Right channel high band control block. External capacitor connections. Right channel high mid band control block. External capacitor connections. Right channel low mid band control block. External capacitor connections. Right channel low band control block. External capacitor connections. Unused pins. These pins must be either left open or connected to VSS. Internal operational amplifier reference voltage generator outputs. Several capacitors with values of about 10 F must be connected with this pin to reduce ripple. Power supply. These pins must be connected to the stipulated power supply. Chip enable input. Data is written to the internal latch and the analog switches operate when this pin changes from high to low. Data transfer is enabled when this pin is high. Serial data and clock inputs for IC control Left channel high band control block. External capacitor connections. Left channel high mid band control block. External capacitor connections. Function
No. 5913-4/10
LC75281E Block Diagram
Low band
Low mid band
High mid band
High band
The blocks enclosed in dotted lines are identical.
No. 5913-5/10
LC75281E * Center frequency (fo)
Band Low Low mid High mid High f1 31.5 160 630 1.6 k f2 40 200 800 2k f3 50 250 1k 2.5 k f4 63 315 1.25 k 3.15 k f5 80 400 1.6 k 4k f6 100 500 2k 5k f7 125 630 2.5 k 6.3 k f8 160 800 3.15 k 8k f9 200 1k 4k 10 k f10 250 1.25 k 5k 12.5 k f11 315 1.6 k 6.3 k 16 k External capacitor (F) 0.047 0.0094 0.00235 0.0094
External capacitor calculations Figure a shows the LC75281E internal f0 control circuit. The center frequency f0 can be set to one of 11 frequencies in 1/3 octave steps by switching the resistors in the figure.
Figure a
The value of the external capacitor C is determined by substituting the desired center frequency in the following formula. Cf = 1 2 Rf fo max * Rb//Rf Ra + (Rb//Rf)
fo max: Corresponds to 315 Hz in the low band row in the preceding table.
Equivalent Circuit for Cf calculation
* Gain: 13 positions in 2-dB steps *Q
Q1 Q OCT 0.404 3 Q2 0.667 2 Q3 1.41 1 Q4 2.15 2/3 Q5 2.87 1/2 Q6 4.32 1/3 Q7 5.76 1/4 Q8 8.65 1/6
No. 5913-6/10
LC75281E Data Input Procedure The LC75281E is controlled by inputting the stipulated serial data to the CE, CL, and DI pins. The data consists of 28 bits, of which 8 bits are the address and 20 bits are the data.
Address code Q setting
Normal/2x control* Normal 2x
Channel selection
Left and right
Band selection and peaking/shelving selection : Low (Peaking) : Low mid (Peaking) : High mid (Peaking) : Low (Shelving)
Center frequency setting
Gain setting
Note *:
The 2x command doubles the center frequency of all bands. When setting this bit to 1, applications must either enter the band data for one of the bands in bits D1 to D19, or must set both bits D4 and D5 to 0, in which case all other bits are ignored.
No. 5913-7/10
LC75281E Sample Application Circuit
No. 5913-8/10
LC75281E
Gain Characteristics (Peaking)
Low band Vin = -20 dB V External capacitor: Cf = 0.047 F Settings: f0 = f11 Q = Q1
Gain Characteristics (Shelving)
Low band Vin = -20 dB V External capacitor: Cf = 0.047 F Settings: f0 = f11 Q = Q1
Output level -- dB
Frequency, f -- Hz
Output level -- dB
Frequency, f -- Hz
Q Characteristics (Peaking)
High mid band Vin = -20 dB V External capacitor: Cf = 0.0022 F Settings: f0 = f17 G = 12 dB
Q Characteristics (Shelving) - 1
Low band Vin = -20 dB V External capacitor: Cf = 0.047 F Settings: f0 = f11 Q = Q1
Output level -- dB
Output level -- dB
Frequency, f -- Hz
Frequency, f -- Hz
Q Characteristics (Shelving) - 2
Low band Vin = -20 dB V External capacitor: Cf = 0.047 F Settings: f0 = f11 G = -12 dB
Center Frequency Characteristics (Peaking)
Low mid band Vin = -20 dB V External capacitor: Cf = 0.01 F Settings: G = 12 dB Q = Q4
Output level -- dB
Frequency, f -- Hz
Output level -- dB
Frequency, f -- Hz
Center Frequency Characteristics (Shelving)
Low band Vin = -20 dB V External capacitor: Cf = 0.047 F Settings: G = 12 dB Q = Q1
Output level -- dB
Frequency, f -- Hz No. 5913-9/10
LC75281E
Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any and all SANYO products described or contained herein fall under strategic products (including services) controlled under the Foreign Exchange and Foreign Trade Control Law of Japan, such products must not be exported without obtaining export license from the Ministry of International Trade and Industry in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of October, 1998. Specifications and information herein are subject to change without notice. No. 5913-10/10


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